Compatibility Notes¶
This page lists current compatibility notes and scope limits based on the current codebase.
CPU Model Scope¶
- The core exposes one execution profile through
M68kCpu. - There is no public API to select CPU model variants (for example 68010/68020 mode switches).
- Some later-family instructions exist (
MOVEC,MOVES,RTD,BKPT), but model behavior is not fully parameterized.
Address Space and Memory Model¶
- All memory accesses are against one flat memory buffer (
cpu->memory,cpu->memory_size). - Addresses are masked to 24-bit (
address & 0x00FFFFFF) before bounds checks. - Per-access host memory callbacks (
m68k_set_read8_callbackand related setters) can replace flat-buffer access for each width; see the API reference for details.
Callback Behavior Notes¶
fc_callbackis emitted for memory reads/writes and instruction fetches.M68K_FC_INT_ACKis defined, but the current interrupt acknowledge path does not emit FC callback events with this code.pc_changed_callbackis triggered when PC is changed throughm68k_set_pc.- Direct PC writes (for example in
m68k_resetandm68k_fetch) do not callpc_changed_callback. reset_callbackis tied to execution of theRESETinstruction, not tom68k_reset().illg_callbackcan be installed, but the current decode/exception path does not call it.
Control Registers and Exception Base¶
VBR,SFC, andDFCfields exist and are accessible throughMOVEC.- Exception vector fetch currently uses
vector * 4from base address zero. VBRis not currently applied as an exception vector base inm68k_exception.SFC/DFCvalues are stored but not used to drive bus access behavior.
Context Save/Restore Format¶
m68k_get_context/m68k_set_contextcopy rawM68kCpustruct bytes.- The blob format should be treated as build-dependent (compiler/ABI/version sensitive), not a stable cross-version interchange format.
m68k_set_contextpreserves destination instance memory binding and installed callbacks.
Loader and Disassembler Notes¶
m68k_load_srecandm68k_load_binreturnfalseonly when file open fails.m68k_load_srecreports malformed lines and continues parsing.- S-record checksum validity is not explicitly validated.
- Loaders write directly into bound flat memory; they do not run emulated bus cycles, invoke host memory callbacks, or raise bus errors. When a record reaches an out-of-range address, the first out-of-range byte is reported to
stderr, the rest of that record is skipped, and parsing continues with the next record. - S-record entry records (
S7/S8/S9) set the program counter throughm68k_set_pc. m68k_disasmreturns instruction bytes consumed; unsupported decode cases may still produce???output text.
JSON Compatibility Harness¶
- The JSON compatibility runner (
tests/test_json.c) has a relaxed default for exception-path state checks. - Tests skipped under the relaxed default are counted and reported per file.
- Strict exception-path checking is available with
ROCKET68_JSON_STRICT=1. - Per-test cycle count verification is available with
ROCKET68_JSON_CYCLES=1. - This behavior is test-harness policy, not a runtime core API toggle.